Breakthrough in computer chip energy efficiency could significantly cut data center and supercomputer electricity use

Good news! Sounds almost spectacular!

"... new, ultra-energy-efficient method to compensate for temperature variations that degrade photonic chips. Such chips “will form the high-speed communication backbone of future data centers and supercomputers,” ...

The issue with photonic chips is that up until now, significant energy has been required to keep their temperature stable and performance high. The team led by Wang, however, has shown that it’s possible to reduce the energy needed for temperature control by a factor of more than 1 million. ..."

From the abstract:

"Silicon microring resonators (Si-MRRs) play essential roles in on-chip wavelength division multiplexing (WDM) systems due to their ultra-compact size and low energy consumption. However, the resonant wavelength of Si-MRRs is very sensitive to temperature fluctuations and fabrication process variation. Typically, each Si-MRR in the WDM system requires precise wavelength control by free carrier injection using PIN diodes or thermal heaters that consume high power. This work experimentally demonstrates gate-tuning on-chip WDM filters for the first time with large wavelength coverage for the entire channel spacing using a Si-MRR array driven by high mobility titanium-doped indium oxide (ITiO) gates. The integrated Si-MRRs achieve unprecedented wavelength tunability up to 589 pm/V, or VπL of 0.050 V cm with a high-quality factor of 5200. The on-chip WDM filters, which consist of four cascaded ITiO-driven Si-MRRs, can be continuously tuned across the 1543–1548 nm wavelength range by gate biases with near-zero power consumption."

Breakthrough in computer chip energy efficiency could cut data center electricity use (secondary source)

Breakthrough in computer chip energy efficiency could cut data center electricity use (primary source)

On-chip wavelength division multiplexing filters using extremely efficient gate-driven silicon microring resonator array (open access)

Fig. 5 (a) Optical microscope image of the fabricated on-chip WDM filters consisting of four cascaded tunable Si-MRRs and testing setup (b) Zoom-in view of the individual tunable Si-MRR of the on-chip WDM filters. The dashed line highlights the ITiO gate. (c) The simulated carrier concentration (Nc), refractive index (n), and extinction coefficient (k) distributions with different applied biases at the ITiO/HfO2 and the Si/HfO2 interfaces.