Amazon's new Ocelot chip brings us closer to building a practical quantum computer

Good news! On the heels of Microsoft's announcement (see my blog post). 

2025 really shapes up to be a of quantum computing takeoff as was frequently suggested.

"Today, Amazon Web Services (AWS) announced Ocelot, a new quantum computing chip that can reduce the costs of implementing quantum error correction by up to 90%, compared to current approaches. Developed by the team at the AWS Center for Quantum Computing at the California Institute of Technology, Ocelot represents a breakthrough in the pursuit to build fault-tolerant quantum computers capable of solving problems of commercial and scientific importance that are beyond the reach of today’s conventional computers. ...

Ocelot was designed from the ground up with error correction “built in.” ...

Ocelot: Fast facts

• Ocelot is a prototype quantum computing chip, designed to test the effectiveness of AWS’s quantum error correction architecture.
• It consists of two integrated silicon microchips. Each chip has an area of roughly 1cm2. They are bonded one on top of the other in an electrically-connected chip stack.
• On the surface of each silicon microchip are thin layers of superconducting materials that form the quantum circuit elements.
• The Ocelot chip is composed of 14 core components: five data qubits (the cat qubits), five ‘buffer circuits’ for stabilizing the data qubits, and four additional qubits for detecting errors on the data qubits.
• The cat qubits store the quantum states used for computation. To do so, they rely on components called oscillators, which generate a repetitive electrical signal with steady timing.
• Ocelot’s high-quality oscillators are made from a thin film of superconducting material called Tantalum. AWS material scientists have developed a specific way of processing Tantalum on the silicon chip to boost oscillator performance.

..."

"... Ocelot achieves the following major technical advances: 

• The first realization of a scalable architecture for bosonic error correction, surpassing traditional qubit approaches to reducing error correction overhead;
• The first implementation of a noise-biased gate — a key to unlocking the type of hardware-efficient error correction necessary for building scalable, commercially viable quantum computers;
• State-of-the-art performance for superconducting qubits, with bit-flip times approaching one second in tandem with phase-flip times of 20 microseconds.

..."

"... a new quantum chip architecture for suppressing errors using a type of qubit known as a cat qubit. Cat qubits were first proposed in 2001, and, since then, researchers have developed and refined them. Now, the AWS team has put together the first scalable cat qubit chip that can be used to efficiently reduce quantum errors. ...

Due to the complexity of superposition found in qubits, they can have two types of errors:

bit flips, as in the classical digital systems, and

phase flips, in which the qubit states of 1 and 0 become out of phase (or out of sync) with each other.

Researchers have developed many strategies to handle both error types in quantum systems, but the methods require qubits to have a significant number of backup partners. In fact, current qubit technologies may require thousands of additional qubits to provide the desired level of protection from errors. ...

The team's new scheme relies on a type of qubit formed from superconducting circuits made of microwave oscillators, in which the 1 and 0 states representing the qubit are defined as two different large-scale amplitudes of oscillation. This makes the qubit states very stable and impervious to bit-flip errors. ...

In fact, the name "cat" qubits refers to the ability of these qubits to take on two very large, or macroscopic states, at the same time—just like the famous cat in Erwin Schrödinger's [cat] thought experiment, which can be both dead and alive simultaneously. ...

The Ocelot chip achieves this by combining five cat qubits, along with special buffer circuits to stabilize their oscillation, and four ancillary qubits to detect phase errors. ..."

From the abstract:

"To solve problems of practical importance, quantum computers probably need to incorporate quantum error correction, in which a logical qubit is redundantly encoded in many noisy physical qubits.

The large physical-qubit overhead associated with error correction motivates the search for more hardware-efficient approaches. Here, using a superconducting quantum circuit, we realize a logical qubit memory formed from the concatenation of encoded bosonic cat qubits with an outer repetition code of distance d = 5.

A stabilizing circuit passively protects cat qubits against bit flips. The repetition code, using ancilla transmons for syndrome measurement, corrects cat qubit phase flips.

We study the performance and scaling of the logical qubit memory, finding that the phase-flip correcting repetition code operates below the threshold. The logical bit-flip error is suppressed with increasing cat qubit mean photon number, enabled by our realization of a cat-transmon noise-biased CX gate.

The minimum measured logical error per cycle is on average 1.75(2)% for the distance-3 code sections, and 1.65(3)% for the distance-5 code. Despite the increased number of fault locations of the distance-5 code, the high degree of noise bias preserved during error correction enables comparable performance.

These results, where the intrinsic error suppression of the bosonic encodings enables us to use a hardware-efficient outer error-correcting code, indicate that concatenated bosonic codes can be a compelling model for reaching fault-tolerant quantum computation."

Amazon's new Ocelot chip brings us closer to building a practical quantum computer "New 'Ocelot' chip uses scalable architecture for reducing error correction by up to 90% and accelerating the development of real-world quantum computing applications."

Amazon announces Ocelot quantum chip (technical report) "Prototype is the first realization of a scalable, hardware-efficient quantum computing architecture based on bosonic quantum error correction."

New Ocelot Chip Makes Strides in Quantum Computing (CalTech's corresponding news release) "Scientists based at the AWS Center for Quantum Computing on Caltech's campus have made a leap forward in figuring out how to suppress errors in quantum computers, a pesky problem that continues to be the greatest hurdle to building the machines of the future."

Hardware-efficient quantum error correction via concatenated bosonic qubits (open access)

The pair of silicon microchips that compose the Ocelot logical-qubit memory chip.

Fig. 1: Repetition code of bosonic qubits.

A dilution refrigerator at the AWS Center for Quantum Computing. Quantum computers require these cooling devices to maintain the quantum chips at ultra-cold temperatures.