Good news! Amazing stuff!
"Researchers in Singapore and the US have independently developed two new types of photonic computer chips that match existing purely electronic chips in terms of their raw performance. The chips, which can be integrated with conventional silicon electronics, could find use in energy-hungry technologies such as artificial intelligence (AI). ...
Light-based computation, which exploits photons instead of electrons, is a promising alternative because it can perform multiplication and accumulation (MAC) much more quickly and efficiently than electronic devices. ...
The Singapore device was made by researchers at the photonic computing firm Lightelligence and is called PACE, for Photonic Arithmetic Computing Engine. It is a hybrid photonic-electronic system made up of more than 16 000 photonic components integrated on a single silicon chip and performs matrix MAC on 64-entry binary vectors. ...
The Lightelligence device, which the team describe in Nature, can solve complex computational problems known as max-cut/optimization problems that are important for applications in areas such as logistics. Notably, its greatly reduced minimum latency – a key measure of computation speed – means it can solve a type of problem known as an Ising model in just five nanoseconds. This makes it 500 times faster than today’s best graphical-processing-unit-based systems at this task. ...
Independently, researchers led by Nicholas Harris at Lightmatter in Mountain View, California, have fabricated the first photonic processor capable of executing state-of-the-art neural network tasks such as classification, segmentation and running reinforcement learning algorithms.
Lightmatter’s design consists of six chips in a single package with high-speed interconnects between vertically aligned photonic tensor cores (PTCs) and control dies. The team’s processor integrates four 128 x 128 PTCs, with each PTC occupying an area of 14 x 24.96 mm. It contains all the photonic components and analogue mixed-signal circuits required to operate and members of the team say that the current architecture could be scaled to 512 x 512 computing units in a single die.
The result is a device that can perform 65.5 trillion adaptive block floating-point 35 (ABFP) 16-bit operations per second with just 78 W of electrical power and 1.6 W of optical power. Writing in Nature, the researchers claim that this represents the highest level of integration achieved in photonic processing. ...
can implement complex AI models such as the neural network ResNet (used for image processing) and the natural language processing model BERT (short for Bidirectional Encoder Representations from Transformers) – all with an accuracy rivalling that of standard electronic processors. It can also compute reinforcement learning algorithms such as DeepMind’s Atari. ...
Both teams fabricated their photonic and electronic chips using standard complementary metal-oxide-semiconductor (CMOS) processing techniques. This means that existing infrastructures could be exploited to scale up their manufacture. Another advantage: both systems were fully integrated in a standard chip interface – a first. ..."
"... Computing stands at an inflection point unlike anything we’ve seen since the transistor was invented. Artificial intelligence workloads are driving computational demands beyond what traditional scaling laws—Moore’s Law, Dennard scaling, and memory scaling—can deliver. All three have effectively stalled, particularly on a per-silicon-area basis. ..."
From the abstract (1):
"Integrated photonics, particularly silicon photonics, have emerged as cutting-edge technology driven by promising applications such as short-reach communications, autonomous driving, biosensing and photonic computing. As advances in AI lead to growing computing demands, photonic computing has gained considerable attention as an appealing candidate. Nonetheless, there are substantial technical challenges in the scaling up of integrated photonics systems to realize these advantages, such as ensuring consistent performance gains in upscaled integrated device clusters, establishing standard designs and verification processes for complex circuits, as well as packaging large-scale systems. These obstacles arise primarily because of the relative immaturity of integrated photonics manufacturing and the scarcity of advanced packaging solutions involving photonics.
Here we report a large-scale integrated photonic accelerator comprising more than 16,000 photonic components. The accelerator is designed to deliver standard linear matrix multiply–accumulate (MAC) functions, enabling computing with high speed up to 1 GHz frequency and low latency as small as 3 ns per cycle. Logic, memory and control functions that support photonic matrix MAC operations were designed into a cointegrated electronics chip.
To seamlessly integrate the electronics and photonics chips at the commercial scale, we have made use of an innovative 2.5D hybrid advanced packaging approach. Through the development of this accelerator system, we demonstrate an ultralow computation latency for heuristic solvers of computationally hard Ising problems whose performance greatly relies on the computing latency."
From the abstract (2):
"Over the past decade, photonics research has explored accelerated tensor operations, foundational to artificial intelligence (AI) and deep learning, as a path towards enhanced energy efficiency and performance. The field is centrally motivated by finding alternative technologies to extend computational progress in a post-Moore’s law and Dennard scaling era.
Despite these advances, no photonic chip has achieved the precision necessary for practical AI applications, and demonstrations have been limited to simplified benchmark tasks.
Here we introduce a photonic AI processor that executes advanced AI models, including ResNet3 and BERT, along with the Atari deep reinforcement learning algorithm originally demonstrated by DeepMind. This processor achieves near-electronic precision for many workloads, marking a notable entry for photonic computing into competition with established electronic AI accelerators and an essential step towards developing post-transistor computing technologies."
A New Kind of Computer (original press release)
An integrated large-scale photonic accelerator with ultralow latency (1, open access)
Universal photonic artificial intelligence acceleration (2, no public access)
Fig. 2: PACE system implementation.
Photonic processor PCI-e card top view and side view as well as a bottom view of the photonic processor chip package.
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